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1 ltc2051/ltc2052 20512fd dual/quad zero-drift operational amplifiers thermocouple amplifiers electronic scales medical instrumentation strain gauge amplifiers high resolution data acquisition dc accurate rc active filters low side current sense maximum offset voltage of 3 v maximum offset voltage drift of 30nv/ c small footprint, low profile ms8/gn16 packages single supply operation: 2. 7v to 5. 5v noise: 1.5 v p-p (0.01hz to 10hz typ) voltage gain: 140db (typ) psrr: 130db (typ) cmrr: 130db (typ) supply current: 0.75ma (typ) per amplifier extended common mode input range output swings rail-to-rail operating temperature range 40 c to 125 c available in 3mm 3mm 0.8mm dfn package the ltc 2051/ltc2052 are dual/quad zero-drift opera- tional amplifiers available in the ms8 and so-8/gn1 6 and s14 packages. for space limited applications, the l tc2051 is available in a 3mm 3mm 0.8mm dual fine pitch leadless package (dfn). they operate from a single 2.7v supply and support 5v applications. the current con- sumption is 750 a per op amp. the ltc2051/ltc2052, despite their miniature size, fea- ture uncompromising dc performance. the typical inp ut offset voltage and offset drift are 0.5 v and 10nv/ c. the almost zero dc offset and drift are supported with a power supply rejection ratio (psrr) and common mode rejec - tion ratio (cmrr) of more than 130db. the input common mode voltage ranges from the negat ive supply up to typically 1v from the positive supply. the ltc2051/ltc2052 also have an enhanced output stage capable of driving loads as low as 2k to both supply rails. the open-loop gain is typically 140db. the ltc2051/ ltc2052 also feature a 1.5 v p-p dc to 10hz noise and a 3mhz gain-bandwidth product. input referred noise 0. 1hz to 10hz high performance low cost instrumentation amplifier , lt, ltc and ltm are registered trademarks of linear tec hnology corporation. all other trademarks are the property of their resp ective owners. 2 1 0 1 2 v 024681 0 time (sec) 2052 ta02 features descriptio u applicatio s u typical applicatio u + r2 10k 0.1% r1 100 0.1% 7 4 5 6 3 2 20512 ta01 5v + 1/2 ltc2051hv 1/2 ltc2051hv 8 1 5v v in v in a v = 101 r2 10k 0.1% r1 100 0.1% downloaded from: http:///
2 ltc2051/ltc2052 20512fd total supply voltage (v + to v ) ltc2051/ltc2052 .................................... .............. 7v ltc2051hv/ltc2052hv ................................ ....... 12v input voltage (note 5) .......... (v + + 0.3v) to (v 0.3v) output short-circuit duration ...................... ... indefinite operating temperature range ............. 40 c to 125 c specified temperature range (note 3) 40 c to 125 c storage temperature range ................ 65 c to 150 c dd package ...................................... 65 c to 125 c lead temperature (soldering, 10 sec) ............... .. 300 c (note 1) order part number abso lute axi u rati g s w w w u packag e/o rder i fo r atio uu w t jmax = 125 c, ja = 190 c/w 1 2 3 4 out a in a +in a v 8 7 6 5 v + out b in b +in b top view ms8 package 8-lead plastic msop 1 2 3 4 5 out a in a +in a v shdn a 10 9 8 7 6 v + out b in b +in b shdn b top view ms10 package 10-lead plastic msop top view v + out b in b +in b out a in a +in a v 1 2 3 4 8 7 6 5 s8 package 8-lead plastic so t jmax = 125 c, ja = 250 c/w t jmax = 125 c, ja = 250 c/w ms8 part marking ltc2051cms8 ltc2051ims8 ltc2051hvcms8 ltc2051hvims8 ltc2051hms8 LTC2051HVHMS8 ltmn ltmp ltpj ltpk ltvf ltvh order part number ms10 part marking ltc2051cms10 ltc2051ims10 ltc2051hvcms10 ltc2051hvims10 ltmq ltmr ltrb ltrc order part number s8 part marking ltc2051cs8 ltc2051is8 ltc2051hvcs8 ltc2051hvis8 ltc2051hs8 ltc2051hvhs8 2051 2051i 2051hv 051hvi 2051h 051hvh consult ltc marketing for parts specified with wide r operating temperature ranges. top view dd package 8-lead (3mm 3mm) plastic dfn 5 6 7 8 4 3 2 1 out a in a +in a v v + out b in b +in b t jmax = 125 c, ja = 160 c/w exposed pad (pin 9) is connected to v (pin 4) order part number* dd part marking ltc2051cdd ltc2051idd ltc2051hvcdd ltc2051hvidd laan lael order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/ 9 downloaded from: http:///
3 ltc2051/ltc2052 20512fd available o ptio s u part number amps/package specified temp range specifie d voltage package ltc2051cdd 2 0 c to 70 c3 v , 5 v d d ltc2051cs8 2 0 c to 70 c 3v, 5v so-8 ltc2051cms8 2 0 c to 70 c 3v, 5v 8-lead msop ltc2051cms10 2 0 c to 70 c 3v, 5v 10-lead msop ltc2051hvcdd 2 0 c to 70 c 3v, 5v, 5v dd ltc2051hvcs8 2 0 c to 70 c 3v, 5v, 5v so-8 ltc2051hvcms8 2 0 c to 70 c 3v, 5v, 5v 8-lead msop ltc2051hvcms10 2 0 c to 70 c 3v, 5v, 5v 10-lead msop ltc2051idd 2 40 c to 85 c3 v , 5 v d d ltc2051is8 2 40 c to 85 c 3v, 5v so-8 ltc2051ims8 2 40 c to 85 c 3v, 5v 8-lead msop ltc2051ims10 2 40 c to 85 c 3v, 5v 10-lead msop ltc2051hvidd 2 40 c to 85 c 3v, 5v, 5v dd ltc2051hvis8 2 40 c to 85 c 3v, 5v, 5v so-8 ltc2051hvims8 2 40 c to 85 c 3v, 5v, 5v 8-lead msop ltc2051hvims10 2 40 c to 85 c 3v, 5v, 5v 10-lead msop ltc2051hs8 2 40 c to 125 c 3v, 5v so-8 ltc2051hms8 2 40 c to 125 c 3v, 5v 8-lead msop ltc2051hvhs8 2 40 c to 125 c 3v, 5v, 5v so-8 LTC2051HVHMS8 2 40 c to 125 c 3v, 5v, 5v 8-lead msop ltc2052cs 4 0 c to 70 c 3v, 5v 14-lead so ltc2052cgn 4 0 c to 70 c 3v, 5v 16-lead ssop ltc2052hvcs 4 0 c to 70 c 3v, 5v, 5v 14-lead so ltc2052hvcgn 4 0 c to 70 c 3v, 5v, 5v 16-lead ssop gn package 16-lead plastic ssop 1 2 3 4 5 6 7 8 top view 16 15 14 13 12 11 10 9 out a in a +in a v + +in b in b out b nc out d in d +in d v +in c in c out c nc order part number ltc2052cgn ltc2052ign ltc2052hvcgn ltc2052hvign ltc2052hgn ltc2052hvhgn t jmax = 125 c, ja = 110 c/w gn part marking 2052 2052i 2052hv 052hvi 2052h 052hvh top view s package 14-lead plastic so 1 2 3 4 5 6 7 14 13 12 11 10 9 8 out a in a +in a v + +in b in b out b out d in d +in d v +in c in c out c t jmax = 125 c, ja = 110 c/w order part number ltc2052cs ltc2052is ltc2052hvcs ltc2052hvis ltc2052hs ltc2052hvhs packag e/o rder i fo r atio uu w downloaded from: http:///
4 ltc2051/ltc2052 20512fd ltc2051c/ltc2052c ltc2051i/ltc2052i ltc2051h/ltc2052h parameter conditions min typ max min typ max units input offset voltage (note 2) 0.5 3 0.5 3 v average input offset drift (note 2) 0.01 0.03 0.01 0.05 v/ c long-term offset drift 50 50 nv/ mo input bias current (note 4) v s = 3v 8 50 8 50 pa v s = 3v 100 3000 pa v s = 5v 25 75 25 75 pa v s = 5v 150 3000 pa input offset current (note 4) v s = 3v 100 100 pa v s = 3v 150 700 pa v s = 5v 150 150 pa v s = 5v 200 700 pa input noise voltage r s = 100 , dc to 10hz 1.5 1.5 v p-p common mode rejection ratio v cm = gnd to v + 1.3, 115 130 115 130 db v s = 3v 110 130 110 130 db v cm = gnd to v + 1.3, 120 130 120 130 db v s = 5v 115 130 115 130 db power supply rejection ratio 120 130 120 130 db 115 130 115 130 db large-signal voltage gain r l = 10k, v s = 3v 120 140 120 140 db 115 140 115 140 db r l = 10k, v s = 5v 125 140 125 140 db 120 140 120 140 db output voltage swing high r l = 2k to gnd v + 0.15 v + 0.06 v + 0.15 v + 0.06 v r l = 10k to gnd v + 0.05 v + 0.02 v + 0.05 v + 0.02 v output voltage swing low r l = 2k to gnd 21 5 21 5 m v r l = 10k to gnd 21 5 21 5 m v slew rate 22 v / s gain bandwidth product 3 3 mhz supply current (per amplifier) no load, v s = 3v, v shdn = v ih 0.75 1.0 0.75 1.1 ma no load, v s = 5v, v shdn = v ih 0.85 1.2 0.85 1.3 ma supply current, shutdown v shdn = v il , v s = 3v 25 25 a v shdn = v il , v s = 5v 41 0 41 0 a (ltc2051/ltc2052, ltc2051hv/ltc2052hv) the denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v s = 3v, 5v unless otherwise noted. (note 3) electrical characteristics available o ptio s u ltc2052is 4 40 c to 85 c 3v, 5v 14-lead so ltc2052ign 4 40 c to 85 c 3v, 5v 16-lead ssop ltc2052hvis 4 40 c to 85 c 3v, 5v, 5v 14-lead so ltc2052hvign 4 40 c to 85 c 3v, 5v, 5v 16-lead ssop ltc2052hs 4 40 c to 125 c 3v, 5v 14-lead so ltc2052hgn 4 40 c to 125 c 3v, 5v 16-lead ssop ltc2052hvhs 4 40 c to 125 c 3v, 5v, 5v 14-lead so ltc2052hvhgn 4 40 c to 125 c 3v, 5v, 5v 16-lead ssop part number amps/package specified temp range specifie d voltage package downloaded from: http:///
5 ltc2051/ltc2052 20512fd electrical characteristics ltc2051c/ltc2052c ltc2051i/ltc2052i ltc2051h/ltc2052h parameter conditions min typ max min typ max units (ltc2051/ltc2052, ltc2051hv/ltc2052hv) the denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v s = 3v, 5v unless otherwise noted. (note 3) shutdown pin input low voltage (v il ) v + 0.5 v + 0.5 v shutdown pin input high voltage (v ih ) v + 0.5 v + 0.5 v shutdown pin input current v shdn = v il , v s = 3v 1 3 1 3 a v shdn = v il , v s = 5v 2 5 2 5 a internal sampling frequency 7.5 7.5 khz ltc2051c/ltc2052c ltc2051i/ltc2052i ltc2051h/ltc2052h parameter conditions min typ max min typ max units input offset voltage (note 2) 1 3 1 3 v average input offset drift (note 2) 0.01 0.03 0.01 0.05 v/ c long-term offset drift 50 50 nv/ mo input bias current (note 4) 90 150 90 150 pa 300 3000 pa input offset current (note 4) 300 300 pa 500 700 pa input noise voltage r s = 100 , dc to 10hz 1.5 1.5 v p-p common mode rejection ratio v cm = v to v + 1.3 125 130 125 130 db 120 130 120 130 db power supply rejection ratio 120 130 120 130 db 115 130 115 130 db large-signal voltage gain r l = 10k 125 140 125 140 db 120 140 120 140 db maximum output voltage swing r l = 2k to gnd 4.75 4.92 4.50 4.92 v r l = 10k to gnd 4.90 4.98 4.85 4.98 v slew rate 22 v / s gain bandwidth product 3 3 mhz supply current (per amplifier) no load, v shdn = v ih 1 1.5 1 1.5 ma supply current, shutdown v shdn = v il 15 30 15 30 a shutdown pin input low voltage (v il ) v + 0.5 v + 0.5 v shutdown pin input high voltage (v ih ) v + 0.5 v + 0.5 v shutdown pin input current v shdn = v il 7 15 7 15 a internal sampling frequency 7.5 7.5 khz note 1: stresses beyond those listed under absolute maximu m ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may a ffect device reliability and lifetime. note 2: these parameters are guaranteed by design. thermoc ouple effects preclude measurements of these voltage levels durin g automated testing. note 3: all versions of the ltc2051/ltc2052 are designed, characterized and expected to meet the extended temperature limit s of 40 c and 125 c. the ltc2051c/ltc2052c/ltc2051hvc/ltc2052hvc are gua ranteed to meet the temperature limits of 0 c and 70 c. the ltc2051i/ltc2052i/ ltc2051hvi/ltc2052hvi are guaranteed to meet temper ature limits of 40 c and 85 c. the ltc2051h/ltc2051hvh and ltc2052h/ltc2052hvh (ltc2051hv/ltc2052hv) the denotes the specifications which apply over the fu ll operating temperature range, otherwise specifications are at t a = 25 c. v s = 5 v unless otherwise noted. (note 3) are guaranteed to meet the temperature limits of 4 0 c and 125 c. note 4: the bias current measurement accuracy depends on t he proximity of the negative supply bypass capacitors to the device under test. because of this, only the bias current of channel b (ltc2051) and channels a and b (ltc2052) are 100% tested to the data sheet specifi cations. the bias currents of the remaining channels are 100% tested to relaxed limits, however, their values are guaranteed by design to m eet the data sheet limits. note 5: this parameter is guaranteed to meet specified per formance through design and characterization. it has not bee n tested. note 6: the ja specified for the dd package is with minimal pcb h eat spreading metal. using expanded metal area on all l ayers of a board reduces this value. downloaded from: http:///
6 ltc2051/ltc2052 20512fd output voltage swing vs load resistance common mode rejection ratio vs frequency dc cmrr vs common mode input range psrr vs frequency typical perfo r a ce characteristics uw frequency (hz) 20 cmrr (db) 40 80 120 140 1 100 1k 100k 20512 g01 0 10 10k 60 100 v s = 3v or 5v v cm = 0.5v p-p v cm (v) 0 100 120 140 68 20512 g02 80 60 24 1 0 40 20 0 cmrr (db) v s = 3v v s = 5v v s = 10v frequency (hz) 20 psrr (db) 40 60 80 120 100 10 1k 10k 1m 20512 g03 0 100 100k psrr +psrr load resistance (k ) 0 0 output swing (v) 1 2 3 4 5 6 246 v s = 3v v s = 5v 8 20512 g04 10 r l to gnd output swing vs output current output current (ma) 0.01 0 output voltage (v) 4 5 6 0.1 1 10 20512 g05 3 2 1 v s = 5v v s = 3v bias current vs temperature output swing vs load resistance 5v load resistance (k ) 0 output voltage (v) 1 3 5 8 20512 g06 1 3 0 2 4 2 4 5 2 4 6 10 r l to gnd gain/phase vs frequency output swing vs output current, 5v supply output current (ma) 0.01 5 output swing (v) 3 2 1 0 1 2 0.1 1 20512 g07 3 4 r l to gnd 5 4 10 frequency (hz) 20 gain (db) phase (deg) 0 40 80 100 100 10k 100k 10m 20512 g08 40 1k 1m 20 60 180 140 100 80 200 160 120 v s = 3v or 5v c l = 50pf r l = 100k phase gain temperature ( c) 10 bias current (pa) 100 1k 10k 50 50 100 125 20512 g09 1 0 v s = 5v v s = 5v v s = 3v downloaded from: http:///
7 ltc2051/ltc2052 20512fd sampling frequency vs supply voltage typical perfo r a ce characteristics uw sampling frequency vs temperature supply current (per amplifier) vs supply voltage supply current (per amplifier) vs temperature 2v/div 1 s/div 0.1 0 1.5 input (v) 500 s/div output (v) a v = 1 r l = 10k c l = 100pf v s = 5v 0 20512 g11 a v = 100 r l = 100k c l = 10pf v s = 3v transient response 2050 g12 input overload recovery input bias current vs input common mode voltage input common mode voltage (v) 5 input bias current (pa) 150 200 250 3 20512 g10 100 50 0 3 1 0 1 5 v s = 5v v s = 5v v s = 3v supply voltage (v) 3 sampling frequency (khz) 7 8 11 20512 g13 6 5 5 7 9 10 9 temperature ( c) 50 sampling frequency (khz) 7 8 125 20512 g14 6 5 0 50 100 10 9 v s = 5v v s = 3v supply voltage (v) 2.5 0 supply current (ma) 0.2 0.4 0.6 0.8 1.0 1.2 4.5 6.5 8.5 10.5 20512 g15 temperature ( c) 50 supply current (ma) 0.4 0.6 125 20512 g16 0.2 0 0 50 100 1.2 1.0 0.8 v s = 3v v s = 5v v s = 5v downloaded from: http:///
8 ltc2051/ltc2052 20512fd the dual chopper op amp buffers the inputs of a1 an d corrects its offset voltage and offset voltage drif t. with the rc values shown, the power-up warm-up time is typic ally 20 seconds. the step response of the composite ampl ifier does not present settling tails. the lt 1677 should be used when extremely low noise, v os and v os drift are needed and the input source resistance is low. (for in- stance a 350 strain gauge bridge.) the lt1012 or equivalent should be used when low bias current (10 0pa) is also required in conjunction with dc to 10hz low noise, low v os and v os drift. the measured typical input offset voltages are less than 1 v. applicatio s i fo r atio w u uu shutdown the ltc2051 includes a shutdown pin in the 10-lead msop. when this active low pin is high or allowed t o float, the device operates normally. when the shutdown pin is pulled low, the device enters shutdown mode; supply current drops to 3 a, all clocking stops and the output assumes a high impedance state. clock feedthrough, input bias current the ltc2051/ltc2052 use autozeroing circuitry to ac hieve an almost zero dc offset over temperature, common mode voltage and power supply voltage. the frequenc y of the clock used for autozeroing is typically 7.5khz. the term clock feedthrough is broadly used to indicate visibil- ity of this clock frequency in the op amp output sp ectrum. there are typically two types of clock feedthrough in autozeroed op amps like the ltc2051/ltc2052. the first form of clock feedthough is caused by the settling of the internal sampling capacitor and is input ref erred; that is, it is multiplied by the closed-loop gain o f the op amp. this form of clock feedthrough is independent of the magnitude of the input source resistance or the mag nitude of the gain setting resistors. the ltc2051/ltc2052 have a residue clock feedthrough of less than 1 v rms input referred at 7.5khz. the second form of clock feedthrough is caused by t he small amount of charge injection occurring during t he sampling and holding of the op amps input offset vo ltage. the current spikes are multiplied by the impedance seen at the input terminals of the op amp, appearing at the output multiplied by the closed-loop gain of the op amp. to reduce this form of clock feedthrough, use small er valued gain setting resistors and minimize the sour ce resistance at the input. if the resistance seen at the inputs is less than 10k, this form of clock feedthrough is less than 1 v rms input referred at 7.5khz, or less than the amount of residue clock feedthrough from the first form previously described. placing a capacitor across the feedback resistor re duces either form of clock feedthrough by limiting the ba ndwidth of the closed-loop gain. input bias current is defined as the dc current int o the input pins of the op amp. the same current spikes t hat cause the second form of clock feedthrough previously described , when averaged, dominate the dc input bias current of the op amp below 70 c. at temperatures above 70 c, the leakage of the esd protection diodes on the inputs increase the input bias currents of both inputs in the positive direction, while the current caused by the charge injection stays relati vely constant. at elevated temperatures (above 85 c) the leakage current begins to dominate and both the neg ative and positive pins input bias currents are in the p ositive direction (into the pins). input pins, esd sensitivity esd voltages above 700v on the input pins of the op amp will cause the input bias currents to increase (mor e dc current into the pins). at these voltages, it is po ssible to damage the device to a point where the input bias c urrent exceeds the maximums specified in this data sheet. typical applicatio u downloaded from: http:///
9 ltc2051/ltc2052 20512fd + 1/2 ltc2051 + a1 + 1/2 ltc2051 6 3 2 5 r4 r5 r3 20512 f01 r2 5v r1 + c2 c1 7 1 6 8 1 3 2 out out obtaining ultralow v os drift and low noise a1 r1 r2 r3 r4 r5 c1 c2 e in (dc 1hz) e in (dc 10hz) lt1677 2.49k 3.01k 340k 10k 100k 0.01 f 0.001 f 0.15 v p-p 0.2 v p-p lt1012 750 57 250k 10k 100k 0.01 f 0.001 f 0.3 v p-p 0.4 v p-p typical applicatio u u packag e descriptio 3.00 0.10 (4 sides) note: 1. drawing to be made a jedec package outline m0-22 9 variation of (weed-1) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package d o not include mold flash. mold flash, if present, shall not e xceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 locati on on top and bottom of package 0.38 0.10 bottom view exposed pad 1.65 0.10 (2 sides) 0.75 0.05 r = 0.115 typ 2.38 0.10 (2 sides) 1 4 8 5 pin 1 top mark (note 6) 0.200 ref 0.00 0.05 (dd) dfn 1203 0.25 0.05 2.38 0.05 (2 sides) recommended solder pad pitch and dimensions 1.65 0.05 (2 sides) 2.15 0.05 0.50 bsc 0.675 0.05 3.5 0.05 package outline 0.25 0.05 0.50 bsc dd package 8-lead plastic dfn (3mm 3mm) (reference ltc dwg # 05-08-1698) downloaded from: http:///
10 ltc2051/ltc2052 20512fd u packag e descriptio ms8 package 8-lead plastic msop (reference ltc dwg # 05-08-1660) ms package 10-lead plastic msop (reference ltc dwg # 05-08-1661) msop (ms8) 0204 0.53 0.152 (.021 .006) seating plane note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusio ns or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or pr otrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.18 (.007) 0.254 (.010) 1.10 (.043) max 0.22 0.38 (.009 .015) typ 0.127 0.076 (.005 .003) 0.86 (.034) ref 0.65 (.0256) bsc 0 6 typ detail a detail a gauge plane 12 3 4 4.90 0.152 (.193 .006) 8 7 6 5 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) 0.52 (.0205) ref 5.23 (.206) min 3.20 3.45 (.126 .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.42 0.038 (.0165 .0015) typ 0.65 (.0256) bsc msop (ms) 0603 0.53 0.152 (.021 .006) seating plane 0.18 (.007) 1.10 (.043) max 0.17 0.27 (.007 .011) typ 0.127 0.076 (.005 .003) 0.86 (.034) ref 0.50 (.0197) bsc 12 3 45 4.90 0.152 (.193 .006) 0.497 0.076 (.0196 .003) ref 89 10 7 6 3.00 0.102 (.118 .004) (note 3) 3.00 0.102 (.118 .004) (note 4) note: 1. dimensions in millimeter/(inch) 2. drawing not to scale 3. dimension does not include mold flash, protrusio ns or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.152mm (.006") per side 4. dimension does not include interlead flash or pr otrusions. interlead flash or protrusions shall not exceed 0.152mm (.006") per side 5. lead coplanarity (bottom of leads after forming) shall be 0.102mm (.004") max 0.254 (.010) 0 6 typ detail a detail a gauge plane 5.23 (.206) min 3.20 3.45 (.126 .136) 0.889 0.127 (.035 .005) recommended solder pad layout 0.305 0.038 (.0120 .0015) typ 0.50 (.0197) bsc downloaded from: http:///
11 ltc2051/ltc2052 20512fd u packag e descriptio information furnished by linear technology corporat ion is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing pate nt rights. s package 14-lead plastic small outline (narrow . 150 inch) (reference ltc dwg # 05-08-1610) 1 n 2 3 4 .150 .157 (3.810 3.988) note 3 14 13 .337 .344 (8.560 8.738) note 3 .228 .244 (5.791 6.197) 12 11 10 9 5 6 7 n/2 8 .016 .050 (0.406 1.270) .010 .020 (0.254 0.508) 45 0 8 typ .008 .010 (0.203 0.254) s14 0502 .053 .069 (1.346 1.752) .014 .019 (0.355 0.483) typ .004 .010 (0.101 0.254) .050 (1.270) bsc .245 min n 12 3 n/2 .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or pr otrusions. mold flash or protrusions shall not exceed .006 " (0.15mm) gn package 16-lead plastic ssop (narrow . 150 inch) (reference ltc dwg # 05-08-1641) gn16 (ssop) 0204 12 3 4 5 6 7 8 .229 .244 (5.817 6.198) .150 .157* * (3.810 3.988) 16 15 14 13 .189 .196* (4.801 4.978) 12 11 10 9 .016 .050 (0.406 1.270) .015 .004 (0.38 0.10) 45 0 8 typ .007 .0098 (0.178 0.249) .0532 .0688 (1.35 1.75) .008 .012 (0.203 0.305) typ .004 .0098 (0.102 0.249) .0250 (0.635) bsc .009 (0.229) ref .254 min recommended solder pad layout .150 .165 .0250 bsc .0165 .0015 .045 .005 * dimension does not include mold flash. mold flash s hall not exceed 0.006" (0.152mm) per side * * dimension does not include interlead flash. interle ad flash shall not exceed 0.010" (0.254mm) per side inches (millimeters) note: 1. controlling dimension: inches 2. dimensions are in 3. drawing not to scale s8 package 8-lead plastic small outline (narrow . 150 inch) (reference ltc dwg # 05-08-1610) .016 .050 (0.406 1.270) .010 .020 (0.254 0.508) 45 0 8 typ .008 .010 (0.203 0.254) so8 0303 .053 .069 (1.346 1.752) .014 .019 (0.355 0.483) typ .004 .010 (0.101 0.254) .050 (1.270) bsc 1 2 3 4 .150 .157 (3.810 3.988) note 3 8 7 6 5 .189 .197 (4.801 5.004) note 3 .228 .244 (5.791 6.197) .245 min .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note: 1. dimensions in 2. drawing not to scale 3. these dimensions do not include mold flash or pr otrusions. mold flash or protrusions shall not exceed .006 " (0.15mm) downloaded from: http:///
12 ltc2051/ltc2052 20512fd ? linear technology corporation 2000 lt 0108 rev d printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com related parts part number description comments ltc1051/ltc1053 precision zero-drift op amp dual/quad ltc1151 15v zero-drift op amp dual high voltage operation 18v ltc1152 rail-to-rail input and output zero-drift op amp single zero-drift op amp with rail-to-rail input and output and shutdown ltc2050 zero-drift op amp in sot-23 single supply ope ration 2.7v to 5v, shutdown ltc2053 zero-drift precision instrumentation amp ms8, 116db cmrr, two external resistors set gain ltc6800 rail-to-rail input and output instrumentatio n amp low cost, ms8, two external resistors set gain + r r2 1/4 ltc2052 r1 1 3 2 + r r2 1/4 ltc2052 r1 7 4 11 14 5 6 v in + r 1/4 ltc2052 12 13 0.1 f 5v 5v + r r2 1/4 ltc2052 r1 8 10 9 0.1 f 20512 f02 v out v out v in = 3 ; input dc 10hz noise ? 0.8 v p-p = r2 r1 noise of each parallel op amp 3 paralleling amplifiers to improve noise typical applicatio u downloaded from: http:///

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